Secure boot bypass via pre-verification init-table writes
Published Aug 19, 2026 · Updated Aug 19, 2026
Secure boot bypass in Ingenic T32, T40, T41, and A1 SoC boot ROMs allows physically proximate attackers to execute unsigned boot code. The boot ROM executes full-address 32-bit writes from an untrusted SPL init table before it checks secure-boot state or verifies the RSA-PSS signature. Write access to SPI NOR boot media is required; clearing the SRAM security flag skips verification, permits firmware replacement, and persists across factory reset.
Summary
What happened
Secure boot bypass in Ingenic T32, T40, T41, and A1 SoC boot ROMs allows physically proximate attackers to execute unsigned boot code. The boot ROM executes full-address 32-bit writes from an untrusted SPL init table before it checks secure-boot state or verifies the RSA-PSS signature. Write access to SPI NOR boot media is required; clearing the SRAM security flag skips verification, permits firmware replacement, and persists across factory reset.
The record
- CVE
- CVE-2026-50719
- Published
- Aug 19, 2026
- Updated
- Aug 19, 2026
- Vendor
- Unknown vendor
- Product
- Unknown product
- Classifications
- CWE-287, CWE-250, T1542.001
- Attack vector
- physical
- Privileges
- unauthenticated
Timeline
How it unfolded
- Aug 19, 2026CVE publishedPublication date reported by the CVE source.
- Aug 19, 2026Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
What conditions does exploitation require?
What is affected?
Affected products and versions are unavailable in this record.
Published CVSS scores
CVSS describes severity. EPSS estimates exploitation probability.
Attacks
What attackers are doing with it
Daily unique IPs observed by Shadowserver honeypots for known exploited vulnerabilities (KEVs). Missing observations do not establish an absence of attacks.
Weakness, pattern, technique
Public exploit references
- T41 init-table injection proof of conceptfunctional · validated
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Technologies
Your stack
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Your stack
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