Processor-state corruption via improper menvcfg WPRI handling
Published Apr 20, 2026 · Updated Apr 20, 2026
State corruption in XiangShan commit aecf601e803bfd2371667a3fb60bfcd83c333027 allows local users to alter reserved status bits. The CSR logic lets crafted menvcfg reads or writes change WPRI fields in xstatus instead of preserving and ignoring those reserved values. Reachability requires M-mode CSR execution or firmware induced to perform it; published evidence establishes processor-state modification but no further consequence.
Summary
What happened
State corruption in XiangShan commit aecf601e803bfd2371667a3fb60bfcd83c333027 allows local users to alter reserved status bits. The CSR logic lets crafted menvcfg reads or writes change WPRI fields in xstatus instead of preserving and ignoring those reserved values. Reachability requires M-mode CSR execution or firmware induced to perform it; published evidence establishes processor-state modification but no further consequence.
The record
- CVE
- CVE-2026-29642
- Published
- Apr 20, 2026
- Updated
- Apr 20, 2026
- Vendor
- Unknown vendor
- Product
- Unknown product
- Classifications
- CWE-1244, CAPEC-114
- Attack vector
- local
- Privileges
- admin
Timeline
How it unfolded
- Apr 20, 2026CVE publishedPublication date reported by the CVE source.
- Apr 20, 2026Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
What conditions does exploitation require?
What is affected?
Affected products and versions are unavailable in this record.
Published CVSS scores
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Attacks
What attackers are doing with it
Daily unique IPs observed by Shadowserver honeypots for known exploited vulnerabilities (KEVs). Missing observations do not establish an absence of attacks.
Weakness, pattern, technique
Public exploit references
- XiangShan menvcfg reproduction testcaseproof of concept · demonstrated
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Technologies
Your stack
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Your stack
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