Guest data corruption via non-coherent ASP access
Published Jun 9, 2026 · Updated Jun 9, 2026
Improper IOMMU register access in affected AMD EPYC processors allows local users with administrative privileges to corrupt SEV-SNP guest data. A hypervisor-controlled system setting disables cache coherency for ASP memory requests, causing the ASP to read stale DRAM while copying pages and updating metadata. Exploitation requires a malicious or compromised hypervisor to change that setting, trigger ASP-managed memory operations, and win a precisely timed race.
Summary
What happened
Improper IOMMU register access in affected AMD EPYC processors allows local users with administrative privileges to corrupt SEV-SNP guest data. A hypervisor-controlled system setting disables cache coherency for ASP memory requests, causing the ASP to read stale DRAM while copying pages and updating metadata. Exploitation requires a malicious or compromised hypervisor to change that setting, trigger ASP-managed memory operations, and win a precisely timed race.
The record
- CVE
- CVE-2025-54509
- Published
- Jun 9, 2026
- Updated
- Jun 9, 2026
- Vendor
- Advanced Micro Devices, Inc.
- Product
- AMD EPYC Embedded 8004 Series Processors
- Classifications
- CWE-1262, T1565
- Attack vector
- local
- Privileges
- admin
Timeline
How it unfolded
- Jun 9, 2026CVE publishedPublication date reported by the CVE source.
- Jun 9, 2026Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
Affected versions are unavailable in this record. Check the vendor advisory for version and patch details.
What conditions does exploitation require?
What is affected?
Published CVSS scores
CVSS describes severity. EPSS estimates exploitation probability.
Attacks
What attackers are doing with it
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Weakness, pattern, technique
Public exploit references
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Technologies
Your stack
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Your stack
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