Debug data corruption via LSU synthesis mismatch
Published Jul 17, 2026 · Updated Jul 17, 2026
Hardware logic error in openRISC OR1200 commit 83ac6b allows context-dependent attackers to corrupt data returned to the Debug Unit. A synthesis mismatch in the Load-Store Unit makes the du_lsu_load_dat CPU output unknown instead of returning the requested 64-bit memory value during a debugging load. The condition requires a Debug Unit memory-load request and causes incorrect memory-state interpretation, preventing reliable processor diagnosis.
Summary
What happened
Hardware logic error in openRISC OR1200 commit 83ac6b allows context-dependent attackers to corrupt data returned to the Debug Unit. A synthesis mismatch in the Load-Store Unit makes the du_lsu_load_dat CPU output unknown instead of returning the requested 64-bit memory value during a debugging load. The condition requires a Debug Unit memory-load request and causes incorrect memory-state interpretation, preventing reliable processor diagnosis.
The record
- CVE
- CVE-2025-51677
- Published
- Jul 17, 2026
- Updated
- Jul 17, 2026
- Vendor
- Unknown vendor
- Product
- Unknown product
- Classifications
- Unavailable
- Attack vector
- Unavailable
- Privileges
- Unavailable
Timeline
How it unfolded
- Jul 17, 2026CVE publishedPublication date reported by the CVE source.
- Jul 17, 2026Record updatedLatest update available in the CVE record.
Exploitability
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What is affected?
Affected products and versions are unavailable in this record.
Published CVSS scores
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Attacks
What attackers are doing with it
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Weakness, pattern, technique
No sourced classifications are available.
Public exploit references
- SynFuzz B5 OR1200 triggering vectorproof of concept · demonstrated
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Technologies
Your stack
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Your stack
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