Privilege escalation via premature TLBI completion
Published Jun 9, 2026 · Updated Aug 27, 2026
Privilege escalation in affected Arm CPU cores allows local users to write memory owned by a higher exception level via a TLBI race. A broadcast TLBI can complete before another processing element's affected store becomes globally observable, allowing the store to finish after permissions change. Exploitation requires local code execution and a multicore affected system; it grants kernel privileges or lets a guest escape to the hypervisor.
Summary
What happened
Privilege escalation in affected Arm CPU cores allows local users to write memory owned by a higher exception level via a TLBI race. A broadcast TLBI can complete before another processing element's affected store becomes globally observable, allowing the store to finish after permissions change. Exploitation requires local code execution and a multicore affected system; it grants kernel privileges or lets a guest escape to the hypervisor.
The record
- CVE
- CVE-2025-10263
- Published
- Jun 9, 2026
- Updated
- Aug 27, 2026
- Vendor
- Arm
- Product
- Cortex-X925
- Classifications
- CWE-362, CWE-266, T1068
- Attack vector
- local
- Privileges
- authenticated
Timeline
How it unfolded
- Jun 9, 2026CVE publishedPublication date reported by the CVE source.
- Aug 27, 2026Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
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- Affected versionversion=0
What conditions does exploitation require?
What is affected?
Attacks
What attackers are doing with it
Daily unique IPs observed by Shadowserver honeypots for known exploited vulnerabilities (KEVs). Missing observations do not establish an absence of attacks.
Weakness, pattern, technique
Public exploit references
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Technologies
Your stack
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Your stack
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