Ring0 code execution via unvalidated SMI handler input
Published Nov 14, 2023 · Updated Aug 2, 2024
Improper input validation in the SMM Supervisor on affected AMD Ryzen processors allows attackers to execute code at Ring0. During SMM Supervisor initialization, the supervisor accepts insufficiently validated input from a compromised SMI handler; AMD does not identify the field or validation rule. Exploitation requires SMEP and UMIP to be disabled and control of an SMI handler, and successful exploitation compromises confidentiality, integrity, and availability.
Summary
What happened
Improper input validation in the SMM Supervisor on affected AMD Ryzen processors allows attackers to execute code at Ring0. During SMM Supervisor initialization, the supervisor accepts insufficiently validated input from a compromised SMI handler; AMD does not identify the field or validation rule. Exploitation requires SMEP and UMIP to be disabled and control of an SMI handler, and successful exploitation compromises confidentiality, integrity, and availability.
The record
- CVE
- CVE-2023-20596
- Published
- Nov 14, 2023
- Updated
- Aug 2, 2024
- Vendor
- AMD
- Product
- AMD Ryzen 7035 Series Processors with Radeon Graphics (Rembrandt-R)
- Classifications
- T1068
- Attack vector
- local
- Privileges
- admin
Timeline
How it unfolded
- Nov 14, 2023CVE publishedPublication date reported by the CVE source.
- Aug 2, 2024Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
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- Affected versionversion=various
What conditions does exploitation require?
What is affected?
Published CVSS scores
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CVSS describes severity. EPSS estimates exploitation probability.
Attacks
What attackers are doing with it
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Weakness, pattern, technique
Public exploit references
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Technologies
Your stack
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Your stack
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