Unauthorized instruction execution via invalid MULHU operands
Published Jun 29, 2022 · Updated Aug 3, 2024
Improper instruction validation in OpenHW Group CVA6 commit 909d85a allows attackers to execute a prohibited MULHU sequence. The RTL fails to raise the required illegal-instruction exception when MULHU's high-result register matches either source register, so the multiplication unit accepts a register combination forbidden by the RISC-V ISA. Triggering the flaw requires code execution on a CVA6-based core and permits only the otherwise-illegal multiplication sequence; no broader data disclosure, privilege gain, or service interruption is documented.
Summary
What happened
Improper instruction validation in OpenHW Group CVA6 commit 909d85a allows attackers to execute a prohibited MULHU sequence. The RTL fails to raise the required illegal-instruction exception when MULHU's high-result register matches either source register, so the multiplication unit accepts a register combination forbidden by the RISC-V ISA. Triggering the flaw requires code execution on a CVA6-based core and permits only the otherwise-illegal multiplication sequence; no broader data disclosure, privilege gain, or service interruption is documented.
The record
- CVE
- CVE-2022-33023
- Published
- Jun 29, 2022
- Updated
- Aug 3, 2024
- Vendor
- Unknown vendor
- Product
- Unknown product
- Classifications
- CWE-276
- Attack vector
- Unavailable
- Privileges
- Unavailable
Timeline
How it unfolded
- Jun 29, 2022CVE publishedPublication date reported by the CVE source.
- Aug 3, 2024Record updatedLatest update available in the CVE record.
Exploitability
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What is affected?
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Attacks
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Weakness, pattern, technique
Public exploit references
- missexcept testcaseproof of concept · demonstrated
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Technologies
Your stack
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