Cross-core code execution via unprotected shared memory
Published Oct 19, 2023 · Updated Aug 3, 2024
Memory isolation failure in Motorola MTM5000 series firmware allows local users controlling one processor core to execute code on the other. MPU1 and MPU2 are left unconfigured for shared RAM and DDR2 pages, allowing either core to overwrite instructions that the other core executes. Exploitation requires prior control of the ARM or DSP core and crosses the hardware trust boundary, granting code execution on the peer core.
Summary
What happened
Memory isolation failure in Motorola MTM5000 series firmware allows local users controlling one processor core to execute code on the other. MPU1 and MPU2 are left unconfigured for shared RAM and DDR2 pages, allowing either core to overwrite instructions that the other core executes. Exploitation requires prior control of the ARM or DSP core and crosses the hardware trust boundary, granting code execution on the peer core.
The record
- CVE
- CVE-2022-27813
- Published
- Oct 19, 2023
- Updated
- Aug 3, 2024
- Vendor
- Unknown vendor
- Product
- Unknown product
- Classifications
- CWE-1260, T1068
- Attack vector
- local
- Privileges
- admin
Timeline
How it unfolded
- Oct 19, 2023CVE publishedPublication date reported by the CVE source.
- Aug 3, 2024Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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What is affected?
Affected products and versions are unavailable in this record.
Published CVSS scores
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Attacks
What attackers are doing with it
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Weakness, pattern, technique
Public exploit references
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Technologies
Your stack
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Your stack
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