Information disclosure via oversized partial MMIO writes
Published Jun 15, 2022 · Updated May 5, 2025
Device Register Partial Write in some Intel Processors allows local users with MMIO access to disclose stale processor data. Undersized writes to certain endpoint MMIO registers copy more bytes than the transaction specifies, placing stale fill-buffer data in the device register. Exploitation requires local access to MMIO, and the resulting exposure is limited to data left in processor fill or uncore buffers.
Summary
What happened
Device Register Partial Write in some Intel Processors allows local users with MMIO access to disclose stale processor data. Undersized writes to certain endpoint MMIO registers copy more bytes than the transaction specifies, placing stale fill-buffer data in the device register. Exploitation requires local access to MMIO, and the resulting exposure is limited to data left in processor fill or uncore buffers.
The record
- CVE
- CVE-2022-21166
- Published
- Jun 15, 2022
- Updated
- May 5, 2025
- Vendor
- Topcon Positioning Systems, Inc.
- Product
- Intel Processors
- Classifications
- CWE-459
- Attack vector
- local
- Privileges
- authenticated
Timeline
How it unfolded
- Jun 15, 2022CVE publishedPublication date reported by the CVE source.
- May 5, 2025Record updatedLatest update available in the CVE record.
Exploitability
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What is affected?
Published CVSS scores
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Attacks
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Weakness, pattern, technique
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Technologies
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Your stack
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