SMU SRAM corruption via insufficient input validation
Published May 9, 2023 · Updated Jan 28, 2025
Improper input validation in the AMD SMU allows local users with high privileges to corrupt SMU SRAM on affected EPYC processors. AMD has not disclosed the specific SMU input path or operation that writes insufficiently validated data into SRAM. Exploitation has high complexity and requires no user interaction; successful corruption can damage SMU state or interrupt service.
Summary
What happened
Improper input validation in the AMD SMU allows local users with high privileges to corrupt SMU SRAM on affected EPYC processors. AMD has not disclosed the specific SMU input path or operation that writes insufficiently validated data into SRAM. Exploitation has high complexity and requires no user interaction; successful corruption can damage SMU state or interrupt service.
The record
- CVE
- CVE-2021-46762
- Published
- May 9, 2023
- Updated
- Jan 28, 2025
- Vendor
- Advanced Micro Devices, Inc.
- Product
- 3rd Gen AMD EPYC Processors
- Classifications
- CWE-20, T1499.004
- Attack vector
- local
- Privileges
- admin
Timeline
How it unfolded
- May 9, 2023CVE publishedPublication date reported by the CVE source.
- Jan 28, 2025Record updatedLatest update available in the CVE record.
Exploitability
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- Affected versionversion=various
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What is affected?
Published CVSS scores
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Attacks
What attackers are doing with it
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Weakness, pattern, technique
Public exploit references
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Technologies
Your stack
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Your stack
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