Service interruption via SMI mailbox checksum read
Published May 9, 2023 · Updated Jan 28, 2025
Out-of-bounds read in AMD Secure Processor firmware allows attackers to interrupt affected Ryzen and Athlon systems via an SMI mailbox. The SMI mailbox checksum calculation reads beyond its bounds, triggers a data abort, and interrupts service. AMD does not publish the crafted input or access path; the demonstrated consequence is limited to a data abort rather than data disclosure or modification.
Summary
What happened
Out-of-bounds read in AMD Secure Processor firmware allows attackers to interrupt affected Ryzen and Athlon systems via an SMI mailbox. The SMI mailbox checksum calculation reads beyond its bounds, triggers a data abort, and interrupts service. AMD does not publish the crafted input or access path; the demonstrated consequence is limited to a data abort rather than data disclosure or modification.
The record
- CVE
- CVE-2021-46749
- Published
- May 9, 2023
- Updated
- Jan 28, 2025
- Vendor
- AMD
- Product
- AMD Ryzen 3000 Series Mobile Processors with Radeon Graphics (Picasso)
- Classifications
- CWE-125, T1499.004
- Attack vector
- network
- Privileges
- unauthenticated
Timeline
How it unfolded
- May 9, 2023CVE publishedPublication date reported by the CVE source.
- Jan 28, 2025Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
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- Affected versionversion=various
What conditions does exploitation require?
What is affected?
Attacks
What attackers are doing with it
Daily unique IPs observed by Shadowserver honeypots for known exploited vulnerabilities (KEVs). Missing observations do not establish an absence of attacks.
Public exploit references
No public exploit references are available in this record.
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Technologies
Your stack
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Your stack
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