Cross-context memory disclosure via un-restored TSX controls
Published Jun 29, 2021 · Updated Aug 3, 2024
Information disclosure in Xen Hypervisor 4.11.x, 4.12.x, and 4.13.x allows guest OS users to sample memory after an S3 resume. The CPU0 S3 resume path reloads microcode but omits tsx_init, so the selected MSR_TSX_CTRL setting that disables TSX is not restored. Exposure requires a TAA-susceptible Intel x86 processor, the earlier TAA mitigation, S3 suspend and resume, and attacker execution on CPU0.
Summary
What happened
Information disclosure in Xen Hypervisor 4.11.x, 4.12.x, and 4.13.x allows guest OS users to sample memory after an S3 resume. The CPU0 S3 resume path reloads microcode but omits tsx_init, so the selected MSR_TSX_CTRL setting that disables TSX is not restored. Exposure requires a TAA-susceptible Intel x86 processor, the earlier TAA mitigation, S3 suspend and resume, and attacker execution on CPU0.
The record
- CVE
- CVE-2021-28690
- Published
- Jun 29, 2021
- Updated
- Aug 3, 2024
- Vendor
- Xen Project
- Product
- Xen Hypervisor
- Classifications
- Unavailable
- Attack vector
- local
- Privileges
- authenticated
Timeline
How it unfolded
- Jun 29, 2021CVE publishedPublication date reported by the CVE source.
- Aug 3, 2024Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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Is a vulnerable build present?
Compare these published version ranges with your installed build and any vendor patches.
- Affected versionversion=4.11.x
- Affected versionversion=4.12.x
- Affected versionversion=4.13.x <unspecified
What conditions does exploitation require?
What is affected?
Published CVSS scores
CVSS describes severity. EPSS estimates exploitation probability.
Attacks
What attackers are doing with it
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Weakness, pattern, technique
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Public exploit references
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Technologies
Your stack
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Your stack
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