SEV guest-memory disclosure via stale TLB translations
Published May 11, 2022 · Updated Sep 16, 2024
TLB-flush failure in AMD EPYC SEV guest VMs allows local users to disclose guest memory via stale address translations. After a sequence that creates a new VMCB, the CPU fails to invalidate the TLB, so microcode reuses stale translations for SEV memory accesses. Exploitation requires local low-privileged access to a standard SEV guest; SEV-ES and SEV-SNP guests are not affected.
Summary
What happened
TLB-flush failure in AMD EPYC SEV guest VMs allows local users to disclose guest memory via stale address translations. After a sequence that creates a new VMCB, the CPU fails to invalidate the TLB, so microcode reuses stale translations for SEV memory accesses. Exploitation requires local low-privileged access to a standard SEV guest; SEV-ES and SEV-SNP guests are not affected.
The record
- CVE
- CVE-2021-26342
- Published
- May 11, 2022
- Updated
- Sep 16, 2024
- Vendor
- AMD
- Product
- AMD EPYC Processors
- Classifications
- Unavailable
- Attack vector
- local
- Privileges
- authenticated
Timeline
How it unfolded
- May 11, 2022CVE publishedPublication date reported by the CVE source.
- Sep 16, 2024Record updatedLatest update available in the CVE record.
Exploitability
Present is not the same as exploitable
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- Affected versionversion=various
What conditions does exploitation require?
What is affected?
Attacks
What attackers are doing with it
Daily unique IPs observed by Shadowserver honeypots for known exploited vulnerabilities (KEVs). Missing observations do not establish an absence of attacks.
Weakness, pattern, technique
No sourced classifications are available.
Public exploit references
No public exploit references are available in this record.
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Technologies
Your stack
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Your stack
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